The ever innovative and prolific Mr. Woodward has offered “PWM-programmed LM317 constant current source,” an intriguing programmable constant current source which elicited a lively conversation in its comments section. A Zen paradox arose: if the addition of a capacitor between ground and the LM317 ADJ pin reduces the power supply-induced ripple current delivered to the load while also reducing the impedance seen by the load (making it a less “Ideal” current source), is it a better or worse “constant current source”? To answer the question, it must also be considered that the capacitor also slows the response to load current changes which result from alteration of the PWM duty cycle. In the end, the answer depends on the application. But I’m sure a Zen master would have a better answer to the question than “it depends.”

Wow the engineering world with your unique design: Design Ideas Submission Guide

Even without the capacitor, the time constant and non-linear nature of the design idea’s (DI’s) PWM-driven circuit has limitations if used as a source of AC signals. Of course, the title of the DI makes it clear that supplying AC current to the load was not a performance goal. But one of the commenters was interested in delivering both AC and DC currents.

Basic LM317 current source

I wondered if the subcircuit consisting of the LM317 and resistors Rs and Rc could form the basis for such a circuit if it were driven from a suitable control current. In Figure 1, the first step to investigating this was to simulate a basic LM317 current source [1] made of U1 and Rs1 to drive load RL1. The load current is 10 mA.

Figure 1 A series of LM317 circuits investigated in simulation and on the test bench for suitability as a current source.

The circuit’s broadband PSRR was simulated, measured in ohms, and defined as the ratio of the AC voltage of the V1 supply to the AC current through RL1. From DC to almost 1 kHz, the result was a little over 100 kΩ, falling to a bit below 10kΩ at 10kHz. So far, so good. Next, the candidate subcircuit containing U2 was tested. Ideal infinite impedance DC current source I1 (chosen to ensure no degradation of subcircuit performance) arranged for RL2 to also receive 10 mA DC. I expected pretty much the same PSRR here. But to my surprise, the DC to 1kHz impedance had fallen to a little under 2 kΩ and to a bit more than 100 Ω at 10 kHz!

Looking closer, there was no current at all flowing through the LM317 ADJ pin, not even the datasheet’s nominal 50 µA DC. As a result, nor was there any AC current flowing through either Rc2 or the ADJ to explain the PSRR drop. Clearly, the LM317 file [2] I was using for simulation was not suitable for testing PSRR. There are other files from the site listed in the footnote which I’ll investigate at a later date, but for now I decided instead to do some good old lab bench tests.

Bench Tests

The circuit I’ve bench-tested for PSRR is the one which has U3 as its central element. The result was much closer to but also better than the simulated U1: 500 kΩ from DC to 1 kHz, falling to 360 kΩ at 10 kHz and 80 kΩ at 50 kHz. But while I was on the bench, I started to look closely at some other things.

The U3 circuit works by subtracting a voltage drop, Vdrop, across Rc3 from the LM317’s Vref (the voltage difference between OUT and ADJ) and applying Vref – Vdrop across Rs3. Careful attention must be paid to the accuracy of Vdrop, which is challenge enough. But then there is Vref; what are its limits?

I decided to make some DC measurements. I have eight Texas Instruments LM317KCS IC’s (TO-220 package), all with same date code marking. Using the U4 circuit, I measured the Vo (OUT) of each of them with V4 set to 12 VDC. Vo ranged from 1.243 V to 1.263 V, a 20-mV difference. For one of them, I set V4 to 15 V for 5 minutes, and then to 25 V for the same time period.

After these time intervals elapsed, the measurements revealed a drop of 27 mV in Vo. This is more than the 5 mV at 25°C that comes from the spec’s line regulation of .04% per 1-V line voltage change. So, I rechecked my measurements but got the same result. From all these measurements, it’s impossible to determine the limits of Vref over different IC’s, load currents, DC input voltages, and junction temperatures of an arbitrary circuit. Then of course, there’s Noah’s revenge: every 40 days the long-term stability parameter could gift us with a 1% of Vref shift: 12.5 mV. Looking at all of this, I settled on the spec’s reference voltage limit of 1.25 V ± 50 mV for Vref. So what is the impact of this ambiguity?

Implications

We do want a programmable supply, so let’s stick with the U2 configuration and defer considerations for a practical programmable current source in place of I1. Regardless of the resistor values, the current that that circuit delivers to the load is:

ILoad = Vref / Rs + (Iadj – I1) * Rc / Rs

The maximum value of ILoad, Imax, occurs when I1 is zero. When the circuit is asked to deliver Imax/10, (Iadj – I1) * Rc will ideally be set to about .9 * Vref. But now ILoad is equal to 125 ± 50mV; a ± 40% variation! Things get worse if less than Imax/10 is required. I welcome suggestions as to how to deal with the limited accuracy and operational range seen here. But for now, let’s consider the Figure 2 circuit.

Figure 2 Darlington Q1/Q2 feeds 0-Ω load, V_LOAD, with a current. R2, R5, R4 and C2 establish stability and should be checked in assembled circuits. R1 establishes the minimum Q1 DC bias.

In Figure 2, V_Supply provides power at 12 VDC. V_IN takes on DC voltages of 10, 100 and 1000 mV to produce DC currents of 10, 100 and 1000 mA through V_LOAD. Each voltage source in the schematic produces a sine wave at a frequency of 1, 10, 100, 1000 or 10000 Hz to test PSRR (Figure 3), output impedance (Figure 4), and signal transfer (Figure 5); but only one sinusoidal source is active at a time.

Sine amplitudes for V_LOAD and V_Supply when active are 1-V peak, whereas that for V_IN is 1 mV; so that when summed with the three different DC voltages that V_IN takes on, the net voltage and current will remain positive. All simulation measurements are of currents through V_LOAD. Table 1 lists the simulated verses desired DC currents flowing through that load.

Figure 3 The PSRR impedances in ohms verses frequency as seen by V_LOAD for three different DC currents. Higher impedances are associated with more nearly ideal current sources. (The dots on the curves represent simulation measurements.)

Figure 4 The Impedance in ohms seen by V_LOAD at three different DC currents. Higher impedances are associated with more nearly ideal current sources. The dots on the curves represent simulation measurements.

Figure 5 Transfer impedances in ohms verses frequency from V_IN to V_LOAD. The design goal is a value of 1.0000. The dots on the curves represent simulation measurements.

Table 1 Desired and simulated DC currents for the circuit. Op-amp input offset voltages and other aspects of the circuit will contribute errors not accounted for here.

The AD4084-2 op-amp has a worst-case input offset voltage of 300 µV. The two of them could together contribute up to ± 600 µA in error to the load. There are also the tolerances of resistors Rc1, Rc2 and RsM to consider. The limited beta of the 2N3906 could “steal” up to 10 µA from the load; replacing it with the BC857C could significantly reduce that number. And I have conveniently avoided discussing how to generate the signals produced by the voltage source V_IN, which undoubtedly will contribute their own accuracy errors. But the goal of this DI was to investigate potential power current sources capable of handling both AC and DC currents, and I believe that what was presented here is a candidate that is worth consideration for that.

Christopher Paul has worked in various engineering positions in the communications industry for over 40 years.

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• LM317 smooths but doesn’t regulate

References

1. https://www.ti.com/product/LM317#tech-docs See Figure 18 of the LM317 datasheet accessible from this site.
2. https://groups.io/g/LTspice/filessearch?p=created%2C%2C%2C20%2C2%2C0%2C0&q=lm317, LM317A_002.zip

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