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This year during APEC, much of the focus on the show floor revolved around data center tech, with companies showcasing high-density power supply units (PSU), battery backup units (BBU), intermediate bus converters (IBC), and GPU solutions (Figure 1).
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Figure 1: Up to 12 kW Infineon PSU technology leverages a mixture of the CoolSIC, CoolMOS, and CoolGaN technologies.
The motivation comes from the massive power demand increase that the generative AI, in particular, LLMs have brought on, shooting up the 2% of global power consumption from data centers to a projected 7% by 2030. This power demand originates from the shift from the more 120 kV (single-phase AC) stepped down to 48 V to 250-350 kV (three-phase AC) stepped down to 400 VDC rails attached to the rack and distributed from there (to switches, PSUs, compute trays, switch trays, BBUs, and GPUs).
Infineon’s booth presented a comprehensive suite of solutions from the “power grid to the core.” The BBU technology (Figure 2) utilizes the partial power converter (PPC) topology to enable high power densities (> 12 kW) using scalable 4 kW power converter cards.
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Figure 2: Infineon BBU roadmap, using both Si and GaN to scale up the power density of the converters with high efficiencies. Source: Infineon
The technology boasts an efficiency of 99.5% using lower voltage (40 V and 80 V) switches to increase figure of merit (FOM) and yield efficiency gains. The solutions are aimed at meeting space-restrictions of modern BBUs that are outfitted with more and more batteries and hence less space for the embedded DC/DC converter.
Their latest generation of vertical power delivery modules feature a leap in GPU/AI card power delivery, offering up to 2 A/mm2. These improvements create massive space-savings on the already space-constrained AI cards that often require 2000 A to 3000 A for power-hungry chips such as the Nvidia Blackwell GPU.
Instead of being mounted laterally, or alongside the chip, these devices deliver power on the underside of the card to massively reduce power delivery losses. The backside mounting does come with its profile restraints; there is a max height of 5 mm to facilitate heatsink mounting on the other side of the board, so these modules must maintain their 4-mm height.
The first generation of the dual-phase module featured the silicon device that sat on top of the substrate with integrated inductors and capacitors to achieve 1 A/mm2, or 140A max, in a 10 x 9 mm package. This was followed by a dual-phase module that featured a 1.5 A/mm2, or 160 A max, improvement within 8 x 8 mm dimensions. Embedding the silicon into the substrate to have only one PCB is what contributed to the major space-savings in this iteration (Figure 4).
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Figure 4: The second generation of Infineon vertical power delivery modules mounted on the backside of GPU PCB deliver a total of 2000 A. An Infineon controller IC can also be seen providing the necessary voltage/current through coordination with the vertical power delivery modules and chip.
The third generation just released has brought on two more power stages for a quad-phase module for 2 A/mm2, or 280 A max, in the 10 x 9 mm space; doubling the current density of the first generation in the same space (Figure 5).
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Figure 5: Third generation of Infineon vertical power delivery modules are mounted on the backside of GPU PCB delivering a total of 2,000 A.
Custom solutions can go beyond this, integrating more power stages in a single substrate. Other enhancements include bypassing the motherboard and direct-attaching to the substrate in the GPU since PCB substrate materials are lossy for signals with high current densities.
However, this calls for closer collaboration with SoC vendors that are willing to implement system-level solutions. High current density solutions are in the works with Infineon, potentially doubling the current density with another multi-phase module.
The Navitas booth also showed two form factors of PSUs: a common redundant power supply (CRPS) form factor and a longer PSU that meets open compute project (OCP) guidelines and compiled to the ORv3 base specification (Figure 6). The CRPS solution delivers 4.5 kW with two-stages including a SiC PFC end and GaN LLC and offers titanium level efficiency.
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Figure 6: Typical rack is shown with RAM, GPU, PSUs, and airflow outlet with barrel fans. The PSUs conform to the CRPS and provide redundancy to encourage zero downtime in the event of transient faults, brownouts, and blackouts.
Hyperscalers or high performance compute (HPC) applications that utilize the OCP architecture can install PSUs in a row to centralize power in the rack. The Navitas PSU offered for this datacenter topology offers up to 8.5 kW with up to a 98% efficiency using a three-phase interleaved CCM totem pole SiC PFC and three-phase GaN LLC (Figure 7).
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Figure 7: Navitas 8.5 kW PSU is geared toward hyperscalers using both Gen-3 Fast SiC and GaNSafe devices.
Aalyia Shaukat, associate editor at EDN, has worked in the design publishing industry for six years. She holds a Bachelor’s degree in electrical engineering from Rochester Institute of Technology, and has published works in major EE journals as well as trade publications.
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