This design idea revisits another: “PWM power DAC incorporates an LM317.” Like the earlier circuit, this one implements a power DAC by integrating an LM317 positive regulator into a mostly passive PWM topology. It exploits the built-in features of that time-proven Bob Pease masterpiece so that its output is proportional to the guaranteed 2% precision of the LM317 internal voltage reference and is inherently protected from overloading and overheating.
Wow the engineering world with your unique design: Design Ideas Submission Guide
However, unlike the earlier design idea that requires a separate 15v DC power input, this remake (shown in Figure 1) adds a switching input boost preregulator so it can run from a 5v logic rail. The previous linear design also has a limited power efficiency that actually drops below single-digit percentages when driving low voltage loads. The preregulator fixes that by tracking the input-output voltage differential across the LM317 and maintains a constant 3v. This is the just adequate dropout-suppressing headroom for the LM317, minimizing wasted power.
Here’s how it works.
Figure 1 LM317 and HC4053 combine to make a PWM power DAC while Q1 forces preregulator U3 to track and maintain a constant 3v U2 I/O headroom differential to improve efficiency.
As described in the earlier DI, switches U1b and U1c accept a 10-kHz PWM signal to generate a 0v to 11.25v “ADJ” control signal for the U2 regulator via feedback networks R1, R2, and R3. The incoming PWM signal is AC coupled so that U1 can “float” on U2’s output. U1c provides a balanced inverse of the PWM signal, implementing active ripple cancellation as described in “Cancel PWM DAC ripple with analog subtraction.”
Note that R1||R2 = R3 to optimize ripple subtraction and DAC accuracy. This feedback arrangement makes U2’s output voltage follow this function of PWM duty factor (DF):
Vout = 1.25 / (1 – DF(1 – R1/(R1 + R2))) = 1.25 / (1 – 0.9 DF),
as graphed in Figure 2.
Figure 2 Vout (1.25v to 12.5v) versus PWM DF (0 to 1) where Vout = 1.25 / (1 – 0.9 DF).
Figure 3 plots the inverse of Figure 2, yielding the PWM DF required for any given Vout.
Figure 3 The inverse of Figure 2 or, the PWM DF required for any given Vout, where PWM DF = (1.111 – 1.389/Vout).
About that tracking preregulator thing: Control of U3 to maintain the 3v of headroom required to hold U2 safe from dropout relies on Q1 acting as a simple (but adequate) differential amplifier. Q1 drives U3’s Vfb voltage feedback pin to maintain Vfb = 1.245v. Therefore (where Vbe = Q1’s emitter-base bias):
Vfb/R7 = ((U2in – U2out) – Vbe)/R6
1.245v = (U2in – U2out – 0.6v)/(5100/2700)
U2in – U2out = 1.89 * 1.245v + 0.6v = 3v
Meanwhile, deducing what Q2 does is left as an exercise for the astute reader. Hint: It saves about a third of a wattage over the original DI at Vout = 12v.
Note, if you want to use this circuit with a different preregulator with a different Vfb, just adjust:
R7 = R6 Vfb/2.4
In closing…
Thanks must go to reader Ashutosh for his clever suggestion to improve power DAC efficiency with a tracking regulator, also (and especially) to editor Aalyia for her creation of a Design Idea environment that encourages such free and friendly cooperation!
Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.
Related Content
- PWM power DAC incorporates an LM317
- Cancel PWM DAC ripple with analog subtraction
- A faster PWM-based DAC
- Parsing PWM (DAC) performance: Part 1—Mitigating errors
- Cancel PWM DAC ripple with analog subtraction but no inverter
- Parsing PWM (DAC) performance: Part 1—Mitigating errors
- Phased-array PWM DAC
The post Tracking preregulator boosts efficiency of PWM power DAC appeared first on EDN.